72518-14111

Faculty Profile

Mr. Deepak Mittal
Assistant Professor
Institute of Engineering and Technology
Department of Electronics & Communications

Contact Details:

Email: deepak.mittal@gla.ac.in

Contact Number: 8273093425

Experience

Five  years Teaching/Research/Industry experience in the field of Electronics Engineering

Qualifications

M.TECH (VLSI DESIGN) from VIT University TAMILNADU.

B.TECH (ELECTRONICS & TELECOMMUNIATION) from IETE NEW DELHI.

Publication

Journal

  • Deepak Mittal and Vigneswaran T. “Leakage Reduction Using Power Gating Techniques in SRAM Sense Amplifiers”, ARPN Journal of Engineering and Applied Sciences, VOL. 10, NO. 7, page no. 2994, APRIL 2015.
  • Deepak Mittal and Vigneswaran. T.Extraordinary Leakage Suppression Techniques in Memory System Design International Journal of Applied Engineering Research (IJAER), Volume 10, NO. 20, pp.18004-18007, 2015.
  • Deepak Mittal and Vigneswaran T. “Power and Area Efficient Different Adiabatic Logic Based Adders” International Journal of Applied Engineering Research (IJAER), Volume 10, NO. 20, pp. 15797-15801, 2015.
  • Research paper accepted in IEEE ICIIECS’15, IICT, ICKCE Conference and Scopus index journal titled “Implementation of logic circuits with high speed charge recovery logic”.

Conferences/ Seminars/Presented     

  • DRDO Sponsored International IEEE Conference named ICIIECS from MARCH 19-20 2015 atKARPAGAM Engineering College, Coimbatore, Tamilnadu, India.  
  • Smart phones and Set top boxes in System on chip.
  • Clock and power routing in CAD for VLSI.
  • Signal to noise ratio in image processing techniques.
  • Leakage power reduction in Low power IC design.
  • Low power IC design techniques in System on chip.

 

 Membership of professional bodies

  • LIFE MEMBERSHIP OF I.E.T.E.
Admission Query 2017
Admission Query